rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a adp3303 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1998 high accuracy anycap? 200 ma low dropout linear regulator functional block diagram q2 thermal protection g m q1 cc bandgap ref driver r1 r2 adp3303 out in err sd gnd adp3303-5.0 5 4 6 3 nr out in 1 2 7 8 err 330k v e out c2 0.47 m f v out = +5v on off sd c1 0.47 m f v in sd gnd figure 1. typical application circuit features high accuracy over line and load 6 0.8% @ at +25 8 c, 6 1.4% over temperature ultralow dropout voltage: 180 mv (typ) @ 200 ma requires only c o = 0.47 m f for stability anycap = stable with all types of capacitors (including mlcc) 3.2 v to 12 v supply range current and thermal limiting low noise dropout detector low shutdown current: < 1 m a thermally enhanced so-8 package excellent line and load regulation performance applications cellular telephones notebook, palmtop computers battery powered systems portable instruments post regulator for switching supplies bar code scanners general description the adp3303 is a member of the adp330x family of preci- sion low dropout anycap voltage regulators. the adp3303 stands out from the conventional ldos with a novel architec- ture, an enhanced process and a new package. its patented design requires only a 0.47 m f output capacitor for stability. this device is insensitive to capacitor equivalent series resis- tance (esr) and is stable with any good quality capacitor, in- cluding ceramic types (mlcc) for space restricted applications. the adp3303 achieves exceptional accuracy of 0.8% at room temperature and 1.4% overall accuracy over temperature, line and load regulations. the dropout voltage of the adp3303 is only 180 mv (typical) at 200 ma. in addition to the new architecture and process, adis new proprietary thermally enhanced package (thermal coastline) can handle 1 w of power dissipation without external heatsink or large copper surface on the pc board. this keeps pc board real estate to a minimum and makes the adp3303 very attrac- tive for use in portable equipment. the adp3303 operates with a wide input voltage range from 3.2 v to 12 v and delivers a load current in excess of 200 ma. it features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. other features include shutdown and optional noise reduction capabilities. the adp330x anycap ldo family offers a wide range of output voltages and output current levels: adp3300 (50 ma, sot-23) adp3301 (100 ma) adp3302 (100 ma, dual output) adp3307 (100 ma, sot-23-6) adp3308 (50 ma, sot-23-5) adp3309 (100 ma, sot-23-5) anycap is a trademark of analog devices inc.
C2C rev. a (@ t a = C20 8 c to +85 8 c, v in = 7 v, c in = 0.47 m f, c out = 0.47 m f, unless otherwise noted) 1 adp3303-xxCspecifications parameter symbol conditions min typ max units output voltage v out v in = v outnom +0.5 v to 12 v accuracy i l = 0.1 ma to 200 ma t a = +25 c C0.8 +0.8 % v in = v outnom +0.5 v to 12 v i l = 0.1 ma to 200 ma C1.4 +1.4 % line regulation d v o v in = v outnom +0.5 v to 12 v d v in t a = +25 c 0.01 mv/v load regulation d v o i l = 0.1 ma to 200 ma d i l t a = +25 c 0.013 mv/ma ground current i gnd i l = 200 ma 1.5 4 ma i l = 0.1 ma 0.25 0.4 ma ground current i gnd v in = 2.5 v in dropout i l = 0.1 ma 1.12 2.5 ma dropout voltage v drop v out = 98% of v outnom i l = 200 ma 0.18 0.4 v i l = 10 ma 0.02 0.07 v i l = 1 ma 0.003 0.03 v shutdown threshold v thsd on 2.0 v off 0.3 v shutdown pin i sdin 0 < v sd < 5 v 1 m a input current 5 v sd 12 v @ v in = 12 v 22 m a ground current in i q v sd = 0, v in = 12 v shutdown mode t a = +25 c1 m a v sd = 0, v in = 12 v t a = +85 c5 m a output current in i osd t a = +25 c @ v in = 12 v 2.5 m a shutdown mode t a = +85 c @ v in = 12 v 4 m a error pin output leakage i el v eo = 5 v 13 m a error pin output low voltage v eol i sink = 400 m a 0.15 0.3 v peak load current i ldpk v in = v outnom + 1 v 300 ma output noise v noise f = 10 hzC100 khz @ 5 v output c nr = 0 100 m v rms c nr = 10 nf, c l = 10 m f30 m v rms notes 1 ambient temperature of +85 c corresponds to a typical junction temperature of +125 c under typical full load test conditions. specifications subject to change without notice.
adp3303 C3C rev. a caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adp3303 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. pin function descriptions pin mnemonic function 1 & 2 out output of the regulator. b ypass to ground with a 0.47 m f or larger capac itor. pins 1 and 2 must be con- nected together for proper operation. 3 nr noise reduction pin. used for reduc- tion of the output noise. (see text for details.) no connection if not used. 4 gnd ground pin. 5 sd active low shutdown pin. connect to ground to disable the regulator output. when shutdown is not used, this pin should be connected to the input pin. 6 err open collector output. goes low to indicate that the output is about to go out of regulation. 7 & 8 in regulator input. pins 7 and 8 must be connected together for proper operation. pin configuration 1 2 3 4 8 7 6 5 top view (not to scale) out out nr gnd in in err sd adp3303 absolute maximum ratings* input supply voltage . . . . . . . . . . . . . . . . . . . C0.3 v to +16 v shutdown input voltage . . . . . . . . . . . . . . . . C0.3 v to +16 v error flag output voltage . . . . . . . . . . . . . . . C0.3 v to +16 v noise bypass pin voltage . . . . . . . . . . . . . . . . C0.3 v to +5 v power dissipation . . . . . . . . . . . . . . . . . . . internally limited operating ambient temperature range . . . . C20 c to +85 c operating junction temperature range . . . C20 c to +125 c q ja . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 c/w q jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 c/w storage temperature range . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering 10 sec) . . . . . . . +300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c *this is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. ordering guide output package model voltage option* adp3303ar-2.7 2.7 v so-8 adp3303ar-3 3.0 v so-8 adp3303ar-3.2 3.2 v so-8 adp3303ar-3.3 3.3 v so-8 adp3303ar-5 5.0 v so-8 contact the factory for the availability of other output voltage options. *so = small outline. other members of anycap family 1 output package model current options 2 comments adp3300 50 ma sot-23-6 high accuracy adp3301 100 ma so-8 high accuracy adp3302 100 ma so-8 dual output adp3307 100 ma sot-23-6 small size adp3308 50 ma sot-23-5 improved lp2980 adp3309 100 ma sot-23-5 improved mic5205 notes 1 see individual data sheets for detailed ordering information. 2 so = small outline, sot = surface mount. warning! esd sensitive device
adp3303 C4C rev. a Ctypical performance characteristics input voltage ?volts output voltage ?volts 3.3005 3.2985 3.2970 3.3 4 16 5 6 7 8 9 101112131415 3.3000 3.2995 3.2980 3.2975 3.2990 v out = 3.3v i l = 0ma i l = 10ma i l = 200ma i l = 100ma figure 2. line regulation: output voltage vs. supply voltage output load C ma ground current C m a 1600 800 200 0 20 200 40 60 80 100 120 140 160 180 1400 1200 600 400 1000 i l = 0 to 200ma figure 5. quiescent current vs. load current output load ?ma 0 20 200 40 60 80 100 120 140 160 180 180 160 0 80 60 40 20 140 100 120 input-output voltage ?mv figure 8. dropout voltage vs. output current output load ?ma output voltage ?volts 3.2005 3.1990 3.1975 0 20 200 40 60 80 100 120 140 160 180 3.2000 3.1995 3.1985 3.1980 v in = 7v v out = 3.2v figure 3. output voltage vs. load current temperature ? 8 c output voltage ?% 0.2 ?.4 ?5 ?5 135 ? 15 35 75 95 115 55 0.1 0.0 ?.1 ?.2 ?.3 i l = 0ma figure 6. output voltage variation % vs. temperature input voltage ?volts 5 0 03 0 432 4 2 1 3 2 11 input-output voltage ?volts r l = 16.5 v v out = 3.3v figure 9. power-up/power-down input voltage C volts 1.0 0.8 0 0 2 4 6 8 12 14 16 10 0.6 0.4 0.2 v out = 3.3v i l = 0ma ground current C m a figure 4. q uiescent current vs. supply voltage temperature ? 8 c ground current ? m a 2500 2000 0 ?5 ? 135 15 35 55 75 95 115 1500 1000 500 v in = 7v i l = 200ma i l = 0ma figure 7. quiescent current vs. temperature time C m s 0 0 100 200 2.0 v sd = v in or 3v c l = 0.47 m f r l = 16.5 v v out = 3.3v 1.0 3.0 4.0 5.0 6.0 7.0 8.0 20 input-output voltage C volts 40 60 80 120 140 160 180 v in v out figure 10. power-up transient
adp3303 C5C rev. a time ? m s 5.02 4.99 0 20 200 40 60 80 100 120 140 160 180 5.01 5.00 7.0 4.98 7.5 volts 25 v , 0.47 m f load v in v out = 5v figure 11. line transient response time ? m s volts 3.310 3.305 0 200 1000 400 600 800 3.290 200 10 3.300 3.295 ma v out = 3.3v i(v out ) v out c l = 10 m f figure 14. load transient for 10 ma to 200 ma pulse time ? m s volts 4 1 025 5101520 3 2 0 0 5 v out v sd c = 0.47 m f r = 16.5 v on 3.3v output figure 17. turn off time ? m s 5.02 4.99 0 40 400 80 120 160 200 240 280 320 360 5.01 5.00 7.0 4.98 7.5 volts 5k v , 0.47 m f load v in v out = 5v figure 12. line transient response volts time ?sec 3.5 0 05 12 3 4 0 300 100 400 200 3.3v ma v out i out v in = 7v figure 15. short circuit current frequency ?hz ripple rejection ?db 0 ?00 10 100 10m 1k 10k 100k 1m ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 a. 0.47 m f, r l = 33k v b. 0.47 m f, r l = 16.5 v c. 10 m f, r l = 33k v d. 10 m f, r l = 16.5 v b d a c b d a c v out = 3.3v figure 18. power supply ripple rejection time ? m s volts 3.310 3.305 0 200 1000 400 600 800 3.290 200 10 3.300 3.295 ma v out = 3.3v i(v out ) v out c l = 0.47 m f figure 13. load transient for 10 ma to 200 ma pulse time ? m s volts 4 0 40 200 80 120 160 1 0 5 0 3 2 3 c l = 0.47 m f, r l = 3.3k v c l = 10 m f, r l = 3.3k v c l = 10 m f, r l = 16.5 v 3.3v v out sd v in = 7v figure 16. turn on frequency ?hz voltage noise spectral density ? m v/ hz 10 1 0.01 100 1k 100k 10k 0.1 0.47 m f bypass pin 7, 8 to pin 3 v out = 3.3v, c l = 0.47 m f, i l = 1ma, c nr = 0 v out = 5v, c l = 0.47 m f, i l = 1ma, c nr = 0 v out = 2.7-5.0v, c l = 10 m f, i l = 1ma, c nr = 10nf figure 19. output noise density
adp3303 C6C rev. a theory of operation the new anycap ldo adp3303 uses a single control loop for regulation and reference functions. the output voltage is sensed by a resistive voltage divider consisting of r1 and r2, which is varied to provide the available output voltage options. feedback is taken from this network by way of a series diode (d1) and a second resistor divider (r3 and r4) to the input of an amplifier. g m ptat v os r4 r3 d1 r1 attenuation (v bandgap /v out ) r2 (a) compensation capacitor noninverting wideband driver q1 in c load out adp3303 r load ptat current gnd figure 20. functional block diagram a very high gain error amplifier is used to control this loop. the amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input offset voltage that is repeatable and very well controlled. the temperature- proportional offset voltage is combined with the complementary diode voltage to form a virtual bandgap voltage, implicit in the network, although it never appears explicitly in the circuit. ultimately, this patented design makes it possible to control the loop with only one amplifier. this technique also improves the noise characteristics of the amplifier by providing more flexibil- ity on the tradeoff of noise sources that leads to a low noise design. the r1, r2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. although the r1, r2 resistor divider is loaded by the diode d1, and a second divider consist- ing of r3 and r4, the values are chosen to produce a tempera- ture stable output. this unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. the patented amplifier controls a new and unique noninverting driver that drives the pass transistor, q1. the use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and esr of the load capacitance. most ldos place strict requirements on the range of esr val- ues for the output capacitor because they are difficult to sta- bilize due to the uncertainty of load capacitance and resistance. moreover, the esr value, required to keep conventional ldos stable, changes depending on load and temperature. these esr limitations make designing with ldos more difficult because of their unclear specifications and extreme variations over temperature. this is no longer true with the adp3303 anycap ldo. it can be used with virtually any capacitor, with no constraint on the minimum esr. the innovative design allows the circuit to be stable with just a small 0.47 m f capacitor on the output. addi- tional advantages of the pole splitting scheme include superior line noise rejection and very high regulator gain, which leads to excel- lent line and load regulation. an impressive 1.4% accuracy is guaranteed over line, load and temperature. additional features of the circuit include current limit, thermal shutdown and noise reduction. compared to standard solutions that give warning after the output has lost regulation, the adp3303 provides improved system performance by enabling the err pin to give warn ing before the device loses regulation. as the chips temperature rises above 165 c, the circuit acti- vates a soft thermal shutdown, indicated by a signal low on the err pin, to reduce the current to a safe level. to reduce the noise gain of the loop, the node of the main di- vider network (a) is made available at the noise reduction (nr) pin, which can be bypassed with a small capacitor (10 nfC100 nf). application information capacitor selection output capacitors: as with any micropower device, output transient response is a function of the output capacitance. the adp3303 is stable with a wide range of capacitor values, types and esr. a capacitor as low as 0.47 m f is all that is needed for stability; larger capacitors can be used if high output current surges are anticipated. the adp3303 is stable with extremely low esr capacitors (esr ? 0), such as multilayer ceramic capacitors (mlcc) or oscon. input bypass capacitor: an input bypass capacitor is not requ ired; for applications where the input source is high imped- ance or far from the input pins, a bypass capacitor is recom- mended. connecting a 0.47 m f capacitor from the input pins to ground reduces the circuits sensitivity to pc board layout. if a larger value output capacitor is used, then a larger value input capacitor is also recommended. noise reduction a noise reduction capacitor (c nr ) can be used to further reduce the noise by 6 dbC10 db (figure 21). low leakage capacitors in the 10 nfC100 nf range provide the best performance. since the noise reduction pin (nr) is internally connected to a high impedance node, any connection to this node should be carefully done to avoid noise pickup from external sources. the pad connected to this pin should be as small as possible. long pc board traces are not recommended. in out err gnd adp3303-5.0 nr + 6 7 8 1 2 3 4 5 on off + sd c nr 10nf c2 10 m f r1 330k v e out c1 1 m f v out = 5v v in sd figure 21. noise reduction circuit
adp3303 C7C rev. a thermal overload protection the adp3303 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165 c. under extreme conditions (i.e., high ambient temperature and power dissipation), where die temperature starts to rise above 165 c, the output current is reduced until the die temperature has dropped to a safe level. the output current is restored when the die temperature is reduced. current and thermal limit protections are intended to protect the device against accidental overload conditions. for normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125 c. calculating junction temperature device power dissipation is calculated as follows: p d = ( v in C v out ) i load + ( v in ) i gnd where i load and i gnd are load current and ground current, v in and v out are input and output voltages, respectively. assuming i load = 200 ma, i gnd = 2 ma, v in = 7 v and v out = 5.0 v, device power dissipation is: p d = (7 v C 5 v ) 200 ma + (7 v ) 2 ma = 414 mw the proprietary package used in adp3303 has a thermal resistance of 96 c/w, significantly lower than a standard 8-lead soic package at 170 c/w. junction temperature above ambient temperature will be ap- proximately equal to: 0.414 w 96 c/w = 39.7 c to limit the maximum junction temperature to 125 c, maxi- mum ambient temperature must be lower than: t amax = 125 c C 40 c = 85 c printed circuit board layout consideration all surface mount packages rely on the traces of the pc board to conduct heat away from the package. in standard packages, the dominant component of the heat resistance path is the plastic between the die attach pad and the individual leads. in typical thermally enhanced packages, one or more of the leads are fused to the die attach pad, significantly decreasing this component. to make the improvement mean- ingful, however, a significant copper area on the pcb must be attached to these fused pins. the patented thermal coastline lead frame design of the adp3303 (figure 22) uniformly minimizes the value of the dominant portion of the thermal resistance. it ensures that heat is conducted away by all pins of the package. this yields a very low, 96 c/w, thermal resistance for an so-8 package, without any special board layout requirements, relying on the normal traces connected to the leads. the thermal resistance can be decreased by approximately an additional 10% by attaching a few square cm of copper area to the in pin of the adp3303. it is not recommended to use solder mask or silkscreen on the pcb traces adjacent to the adp3303s pins since it will increase the junction to ambient thermal resistance of the package. copper paddle 1 2 3 4 8 7 6 5 copper lead-frame figure 22. thermal coastline error flag dropout detector the adp3303 will maintain its output voltage over a wide range of load, input voltage and temperature conditions. if, for example, the output is about to lose regulation by reducing the supply voltage below the combined regulated output and drop- out voltages, the err flag will be activated. the err output is an open collector, which will be driven low. once set, the err flags hysteresis will keep the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load. shutdown mode applying a ttl high signal to the shutdown ( sd ) pin, or tying it to the input pin, will turn the output on. pulling sd down to 0.3 v or below, or tying it to ground, will turn the output off. in shutdown mode, quiescent current is reduced to much less than 1 m a. application circuits crossover switch the circuit in figure 23 shows that two adp3303s can be used to form a mixed supply voltage system. the output switches between two different levels selected by an external digital input. output voltages can be any combination of voltages from the ordering guide.
adp3303 C8C rev. a c2984aC1C12/98 printed in u.s.a. outline dimensions dimensions shown in inches and (mm). 8-lead small outline ic (so-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 adp3303-5.0 out in gnd output select 5v 0v c1 1.0 m f adp3303-3.3 out in gnd c2 0.47 m f v out = 5v/3.3v v in = 5.5v to 12v sd sd figure 23. crossover switch higher output current the adp3303 can source up to 200 ma without any heatsink or pass transistor. if higher current is needed, an appropriate pass transistor can be used, as in figure 24, to increase the output current to 1 a. v in = 6v to 8v v out = 5v @ 1a mje253* c2 10 m f c1 47 m f r1 50 v *aavid531002 heatsink is used in out err gnd sd adp3303-5 figure 24. high output current linear regulator constant dropout post regulator the circuit in figure 25 provides high precision with low drop- out for any regulated output voltage. it significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the ldo to 60 mw. the adp3000 used in this circuit is a switching regulator in the step-up configuration. d1 1n5817 c2 100 m f 10v l1 6.8 m h r1 120 v adp3303-3.3 in sd out gnd c3 2.2 m f 3.3v @ 160ma c1 100 m f 10v adp3000-adj i lim v in sw1 gnd sw2 fb v in = 2.5v to 3.5v r2 30.1k v 1% q1 2n3906 q2 2n3906 r4 274k v r3 124k v 1% figure 25. constant dropout post regulator
package/price information high accuracy anycap ? 200 ma low dropout linear regulator * this price is provided for budgetary purposes as recommended list price in u.s. dollars per unit in the stated volume. pricing displayed for evaluation boards and kits is based on 1-piece pricing. view pricing and availability for further information. model status package description pin count temperature range price* (100 - 499) adp3303ar - 2.7 production std s.o. pkg (soic) 8 industrial $1.44 adp3303ar - 2.7 - reel production std s.o. pkg (soic) 8 industrial - adp3303ar - 3 production std s.o. pkg (soic) 8 industrial $1.44 adp3303ar - 3 - reel production std s.o. pkg (soic) 8 industrial - adp3303ar - 3.2 production std s.o. pkg (soic) 8 industrial $1.44 adp3303ar-3.2-reel production std s.o. pkg (soic) 8 industrial - adp3303ar-3.3 production std s.o. pkg (soic) 8 industrial $1.44 adp3303ar-3.3-reel production std s.o. pkg (soic) 8 industrial - adp3303ar-5 production std s.o. pkg (soic) 8 industrial $1.44 adp3303ar-5-reel production std s.o. pkg (soic) 8 industrial -
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